Opening for graduate students

2017-01-05 09:56
Computer Systems & Reliable SOC Lab is recruiting students for M.S, integrated M.S./Ph.D., and Ph.D.

Founded in 1994, our lab has been carrying out a diverse array of research projects in the areas of VLSI design, DFT, and CAD in order to implement high performance, high reliability systems in VLSI/CAD.
The primary focus of our research is high reliability SoC (System On a Chip) implementation.

1. Research Area

(1) SOC Design
1) Chip design for computing and media
2) Chip design for network and communication
3) Chip design for test equipments

(2) Test
1) DFT (design for testability) : Scan, LBIST, ABIST, JTAG, etc.
2) SOC test methodology : P1500, Compression low power test, DFM, etc.
3) Memory test : MBIST, BIRA, RA, etc.

(3) CAD
1) Design verification and simulation
2) ATPG (automatic test pattern generation) and fault simulation
3) Synthesis

For more information, please refer to the “Projects” section of this website.

2. Notes on Recruitment

(1) Bachelor's degree or Master's degree holder whose major is Electrical, Electronic, or Computer
engineering, etc.

(2) Courses
1) C / C++ language
2) Digital logic circuit
3) Electronic circuit
4) Digital system design
5) Computer architecture

(3) Research support : Tuition + @

3. How to contact

Please visit Computer Systems & Reliable SOC Lab (room 631 in the third engineering building / Yonsei university) or email your application to Professor Kang. ( / 2123-2775)