- Parallel processing: high-performance computing (HPC), bio processor
- Engine design: deep packet inspection (DPI) engine, adaptable packet engine (APE)
- Reliability: automotive IC
- Test methodology: reduced pin count test (RPCT), massive parallel test (MPT)
- Through silicon via (TSV): test structure, coupling estimation, test optimization, TSV repair
- New trends: software-based self test (SBST), near-threshold voltage (NTV) test
- Scan test: compression, low power scan test
- Methodology: test access mechanism, DFT utility development, diagnosis
- Post-silicon debug: embedded logic analyzer (ELA), error detection
- Memory test: memory built-in self test (MBIST), 3D-DRAM control
- Memory repair: RA, built-in RA (BIRA)
- High speed test methodology: built-off self test (BOST), timing formatter chip (TFC)