34

"Dynamic Power Supply Current Test for CMOS SRAMs"
Do Hyun Yoon, Hongsik Kim, Sungho Kang
Proceedings of International Conference on VLSI and CAD
pp.399-402, October 1999

33

"An Efficient Interconnect Test Using BIST Module in a Boundary Scan Environment"
Hyun-Jin Kim, Jongcheol Shin, Sungho Kang
Proceeding of International Conference on VLSI and CAD
pp.328-329, October 1999

32

"A New Weight Set Generation Algorithm for Weighted Random Pattern Generation"
Hangkyu Lee, Sungho Kang
Proceeding of International Conference on Computer Design
pp.160-165, October 1999

31

"New Scan Design of Asynchronous Sequential Circuits"
Yong Seok Kang, Kyung-Hoi Huh, Sungho Kang
Proceedings of International Conference on AP-ASIC
pp.355-358, August 1999

30

"At-Speed Boundary-Scan Interconnect Testing in a Board with Multiple System Clocks"
Jongcheol Shin, Hyun-Jin Kim, Sungho Kang
Proceedings of International Conference on Design Automation and Test
pp.473-477, March 1999

29

"Weight Set Optimization for Weighted Random Pattern Generation"
Hangkyu Lee, Sungho Kang
Proceedings of International Technical Conference on CSCC
pp.1401-1404, July 1998

28

"A Split Walking One Sequence for Wiring Interconnections"
Hyun-Jin Kim, Jongcheol Shin, Sungho Kang
Proceedings of International Technical Conference on CSCC
pp.329-1332, July 1998

27

"A New BIST for Diagnosis and Transparent Testing in High Density SRAMs"
Myung-Hoon Yang, Jong Cheol Lee, Sungho Kang
Proceedings of International Technical Conference on CSCC
pp.1317-1320, July 1998

26

"An Efficient Bist Architecture for Boards with Multiple Scan Chains"
Yong Tae Yim, Hyun-Jin Kim, Sungho Kang
Proceedings of IEEE International Conference on VLSI and CAD
pp.367-369, October 1997