82 |
"An Effective Test Pattern Generation for Signal Integrity"
|
81 |
"TOSCA: Total Scan Power Reduction Architecture based on Pseudo-Random Built-in Self Test Structure"
|
80 |
"Regular Mapping Methodology on Network on Chip for Heterogeneous Tasking Environment"
|
79 |
"DTMW: Duplicated Transition Monitoring Window for Low Power Test based on Pseudo-Random BIST"
|
78 |
"A New Efficient Binary Search on Range for IP address Lookup"
|
77 |
"An Efficient Operation Mapping Scheme on Hypercube-based Coprocessors with Reconfigurable Datapath"
|
76 |
"An Efficient Diagnosis Method using Pattern Comparison"
|
75 |
"A Partitioned Binary Search Scheme on Multiple Trees for Efficient IP Address Lookup"
|
74 |
"An Accurate Matching Algorithm with essential factors for Fault Diagnosis"
|
73 |
"A Fault Tolerant Carry Select Adder with Modular Self Checking Scheme"
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