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"A NOVEL SCREEN-ABILITY ESTIMATION METHODOLOGY FOR DRAM WITH A TEST ALGORITHM SIMULATOR: FS5"
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"An Ant Colony Optimization Approach for the Preference-based Shortest Path Search"
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"An Area-efficient Built-in Redundancy Analysis for Embedded Memories with Optimal Repair Rate using 2-D Redundancy"
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116 |
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115 |
"DFT for Achieving Hybrid Transiton Delay Fault Test with Reduced Pin Count Testing"
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114 |
"A BIST Architecture for Multiple DACs in an LTPS TFT-LCD Source Driver IC"
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"FPGA-based Verification Methodology of SOC-type CMOS Image Signal Processor"
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