17

"METHOD AND APPARATUS FOR BUILT IN REDUNDANCY ANALYSIS WITH DYNAMIC FAULT RECONFIGURATION"
Inventors : 강성호, 이하영
Patent Number : 11386973, Issue Date : 2022.07.12

16

"STACKED MEMORY APPARATUS USING ERROR CORRECTION CODE AND REPAIR METHOD THEREOF"
Inventors : 강성호, 한동현, 이하영
Patent Number : 11315657, Issue Date : 2022.04.26

15

"CIRCUIT FOR TESTING AND ANALYZING TSV AND METHOD OF TESTING THE SAME"
Inventors : 강성호, 이영우
Patent Number : 10401422, Issue Date : 2019.09.03

14

"THREE DIMENTIONAL INTEGRATED CIRCUIT HAVING REDUNDANT THROUGH SILICON VIA BASED ON ROTATABLE CUBE"
Inventors : 강성호, 정민호
Patent Number : 15/894787, Issue Date : 2019.09.03

13

"STACKED MEMORY DEVICE USING BASE DIE SPARE CELL AND METHOD OF REPAIRING THE SAME"
Inventors : 강성호, 한동현
Patent Number : 15/988970, Issue Date : 2019.08.27

12

"THREE-DIMENSIONAL INTEGRATED CIRCUIT"
Inventors : 강성호, 강동호, 이인걸
Patent Number : 10170398, Issue Date : 2019.01.01

11

"TEST CIRCUIT FOR 3D SEMICONDUCTOR DEVICE AND METHOD FOR TESTING THEREOF"
Inventors : 강성호, 이인걸
Patent Number : 10/095591, Issue Date : 2018.10.9

10

"SEMICONDUCTOR DEVICE AND METHOD FOR TESTING THE SAME"
Inventors : 강성호, 박재석
Patent Number : 10/001525, Issue Date : 2018.06.19

9

"Multi-core device, test device, and method of diagnosing failure"
Inventors : 강성호, 한태우
Patent Number : 9672128, Issue Date : 2017.06.06

8

"Method and device for repairing memory"
Inventors : 강성호, 조기원
Patent Number : 9666309, Issue Date : 2017.05.30