|
14 |
"THREE DIMENTIONAL INTEGRATED CIRCUIT HAVING REDUNDANT THROUGH SILICON VIA BASED ON ROTATABLE CUBE"
|
|
13 |
"STACKED MEMORY DEVICE USING BASE DIE SPARE CELL AND METHOD OF REPAIRING THE SAME"
|
|
12 |
"THREE-DIMENSIONAL INTEGRATED CIRCUIT"
|
|
11 |
"TEST CIRCUIT FOR 3D SEMICONDUCTOR DEVICE AND METHOD FOR TESTING THEREOF"
|
|
10 |
"SEMICONDUCTOR DEVICE AND METHOD FOR TESTING THE SAME"
|
|
9 |
"Multi-core device, test device, and method of diagnosing failure"
|
|
8 |
"Method and device for repairing memory"
|
|
7 |
"Method of Generating Voltage Island for 3D Many-core Chip Multiprocessor"
|
|
6 |
"Apparatus for Implementation of Adaptive Routing in Packet Switching Networks"
|
|
5 |
"Method and Apparatus for Reducing Number of Transitions Generated by Linear Feedback Shift Register"
|
| [1][2][3] |