게시판

14	"Automatic Code Generation for Simulators using Domain Specific Automatic Programming Techniques" Sungho Kang, Stephen A. Szygenda, Youngmin Hur Proceedings of International Conference on Applied Modeling, Simulation and Optimization pp.221-226, June 1995
13	"Massively Parallel Array Processor for Logic, Fault, and Design Error Simulation" Youngmin Hur, Stephen A. Szygenda, Scott Fehr, Gransville Ott. Sungho Kang Proceedings of International Symp. on High Performance Computer Architecture pp.340-347, January 1995
12	"High Performance Fault Simulation using a new Hardware Accelerator" Youngmin Hur, Sungho Kang, Stephen A. Szygenda Proceedings of International Conference on Electronic Hardware Description Languages pp.108-112, January 1995
11	"Path-Delay Fault Simulation for a Standard Scan Design Methodology" Sungho Kang, Bill Underwood, On Law Proceedings of International Conference on Computer Design pp.359-362, October 1994
10	"Fastpath: A Path-Delay Test Generator for Standard Scan Design Methodology" Bill Underwood, Sungho Kang, On Law, Haluk Konuk Proceedings of International Test Conference pp.154-163, October 1994
9	"A Path-Delay Test Generator for Large VLSI Circuits" Bill Underwood, Sungho Kang, On Law Proceedings of International Conference on VLSI and CAD pp.368-371, November 1993
8	"Automatic VHDL Model Generation System" Sungho Kang, Stephen A. Szygenda Proceedings of Conference on Hardware Description Languages and Their Application pp.339-346, April 1993
7	"Modeling and Simulation of Design Errors" Sungho Kang, Stephen A. Szygenda Proceedings of IEEE International Conference on Computer Design pp 443-446, October 1992
6	"New Design Error Modeling and Design Validation Metrics" Sungho Kang, Stephen A. Szygenda Proceedings of European Design Automation Conference pp.472-477, September 1992
5	"Automatic Error Pattern Generation for Design Error Detection in a Design Validation" Sungho Kang, Stephen A. Szygenda Proceedings of IEEE International ASIC Conference pp.533-536, September 1992

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