12

"High Performance Fault Simulation using a new Hardware Accelerator"
Youngmin Hur, Sungho Kang, Stephen A. Szygenda
Proceedings of International Conference on Electronic Hardware Description Languages
pp.108-112, January 1995

11

"Path-Delay Fault Simulation for a Standard Scan Design Methodology"
Sungho Kang, Bill Underwood, On Law
Proceedings of International Conference on Computer Design
pp.359-362, October 1994

10

"Fastpath: A Path-Delay Test Generator for Standard Scan Design Methodology"
Bill Underwood, Sungho Kang, On Law, Haluk Konuk
Proceedings of International Test Conference
pp.154-163, October 1994

9

"A Path-Delay Test Generator for Large VLSI Circuits"
Bill Underwood, Sungho Kang, On Law
Proceedings of International Conference on VLSI and CAD
pp.368-371, November 1993

8

"Automatic VHDL Model Generation System"
Sungho Kang, Stephen A. Szygenda
Proceedings of Conference on Hardware Description Languages and Their Application
pp.339-346, April 1993

7

"Modeling and Simulation of Design Errors"
Sungho Kang, Stephen A. Szygenda
Proceedings of IEEE International Conference on Computer Design
pp 443-446, October 1992

6

"New Design Error Modeling and Design Validation Metrics"
Sungho Kang, Stephen A. Szygenda
Proceedings of European Design Automation Conference
pp.472-477, September 1992

5

"Automatic Error Pattern Generation for Design Error Detection in a Design Validation"
Sungho Kang, Stephen A. Szygenda
Proceedings of IEEE International ASIC Conference
pp.533-536, September 1992

4

"Fast Logic Simulation For Design Verification, using a Non-Dominating Value 'S'"
Sungho Kang, Stephen A. Szygenda
Proceedings of 25th Summer Simulation Conference
pp.235-239, July 1992

3

"Comparative Analysis of Error Simulation Algorithms for Design Validation"
Sungho Kang, Stephen A. Szygenda
Proceedings of Modeling and Simulation Conference
pp.2553-2564, May 1992