게시판

24	"Built-In Self Test for High Density SRAMs" Yong Seok Kang, Jong Cheol Lee, Sungho Kang Proceedings of International Conference on VLSI and CAD pp.52-54, October 1997
23	"Built-In Self Test for Content Addressable Memories" Yong Seok Kang, Jong Cheol Lee, Sungho Kang Proceedings of International Conference on Computer Design pp.48-53, October 1997
22	"Efficient Redundancy Identification for Test Pattern Generation" Sang Yoon Han, Sungho Kang Proceedings of IEEE International ASIC conference pp.52-56, September 1997
21	"A Parallel Test Algorithm for Pattern Sensitive Faults in Semionductor Random Access Memories" Jong Cheol Lee, Yong Seok Kang, Sungho Kang Proceedings of International Symposium on Circuits and Systems pp.2721-2724, June 1997
20	"Efficient Simulation Model Generation Using Automatic Programming Techniques" Jae-Wook Lee, Sungho Kang Proceedings of SCS Winter Simulation Conference pp.708-713, December 1996
19	"An Efficient Path-Delay Fault Simulator for Mixed Level Circuits" Yong Seok Kang, Yong Tae Yim, Sungho Kang Proceedings of IEEE International ASIC Conference pp.263-266, September 1996
18	"Sampling Based Design Verification Using Design Error Models" Sungho Kang Proceedings of IEEE International ASIC Conference pp.197-200, September 1996
17	"An Efficient Method of Path-Delay Test Generation For Standard Scan Designs" Young Seok Kang, Sungho Kang Proceedings of International Technical Conference on Circuits/Systems, Computers and Communications pp.887-890, July 1996
16	"Single Chip Array Processor for High Performance Design Error Simulation" Sungho Kang, Stephen A. Szygenda Proceedings of IEEE International ASIC Conference pp.338-341, September 1995
15	"A New Design Error Simulation Tool based on Error Model and Sampling Techniques" Youngmin Hur, Stephen A. Szygenda, Sungho Kang, S. Shaylaja Proceedings of IMACS European Simualtion Conference on Simulation Tools and Applications pp.179-185, August 1995

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