132 |
"NBTI Aware Voltage Scaling Using Linear Transient Weighted Factors"
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131 |
"A Reliable Massively Parallel Testing Method for Wafer Testing"
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130 |
"Process Variation-Aware Floorplanning for 3D Many-Core Processors"
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129 |
"Integration of Dual Channel Timing Formatter System for High Speed Memory Test Equipment"
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128 |
"New Fault Detection Algorithm for Multi-Level Cell Flash Memories"
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127 |
"Path Search Engine for Fast Optimal Path Search Using Efficient Hardware Architecture"
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125 |
"A New Static Test of a DAC with a Built-in Structure"
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125 |
"A Low-cost DDEM ADC Structure for the Testing of High-performance DACs"
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124 |
"A New Scan Slice Encoding Scheme with Flexible Code for Test Data Compression"
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123 |
"Enhenced Redundancy Analysis for Memories Using Geometric Faults Based Search Tree"
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