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152 |
"A 2-D compaction Method using Macro block for Post-Silicon Validation "
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151 |
"A Scan Segment Skip Technique for Low Power Test "
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150 |
"A New Built-in Redundancy Analysis Algorithm Based On Multiple Memory Blocks"
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149 |
"Failure Bitmap Compression Method for 3D-IC Redundancy Analysis"
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148 |
"KRAFT_K-associative Ralative Addressing Flash Transition Layer"
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147 |
"Low Power Scan Bypass Technique with Test Data Reduction"
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146 |
"Near Optimal Repair Rate Built-in Redundancy Analysis with Very Small Hardware Overhead"
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145 |
"A Scan Shifting Method based on Clock Gating of Multiple Groups for Low Power Scan Testing"
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144 |
"A New Redundancy Analysis Algorithm Using One Side Pivot "
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143 |
"Reducing the Failure Bitmap Size with a Partial Solution Search Tree for the Low Cost Automatic Test Equipment (ATE)."
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