212 |
"APAPG: Address Pre-Processed ALPG for High-Speed Linear Test"
|
211 |
"Scan Architecture with Data Observation for Multiple Scan Cell Fault Diagnosis"
|
210 |
"Signal Shifting-based Reusable Redundant TSV Structure for Infrastructure TSV"
|
209 |
"Effective Data-Width Aware ECC Scheme for HBM"
|
208 |
"LOTS: Low Overhead TSV Repair Method Using IEEE-1838 Standard Architecture"
|
207 |
"GPU-Based Redundancy Analysis using Partitioning Method for Memory Repair"
|
206 |
"Machine Learning based Scan Chain Diagnosis for Double Faults"
|
205 |
"A New Flip-flop Shared Architecture of Test Point Insertion for Scan Design"
|
204 |
"Redundancy Analysis Simplification Scheme for High-Speed Memory Repair"
|
203 |
"ZOS: Zero Overhead Scan for Systolic Array-based AI accelerator"
|
[1][2][3][4][5][6][7][8][9][10] Next Page>> |