4

"Fast Logic Simulation For Design Verification, using a Non-Dominating Value 'S'"
Sungho Kang, Stephen A. Szygenda
Proceedings of 25th Summer Simulation Conference
pp.235-239, July 1992

3

"Comparative Analysis of Error Simulation Algorithms for Design Validation"
Sungho Kang, Stephen A. Szygenda
Proceedings of Modeling and Simulation Conference
pp.2553-2564, May 1992

2

"AFMG: Automatic Functional Model Generation System for Digital Logic Simulation"
Changho Han, Sungho Kang, Stephen A. Szygenda
Proceedings of IEEE International ASIC Conference
pp.12-2.1 - 12-2.4, September, 1991

1

"MOVE: Model Verification System"
Sungho Kang, Stephen A. Szygenda
Proceedings of IEEE International Conference on Computers and Communications
pp.762-768, March 1991