| 15 | 
			"Dynamic Power Supply Current Testing for Open Defects in CMOS SRAMs"
			 | 
| 14 | 
			"Efficient Test Generation Using Redundancy Identification"
			 | 
| 13 | 
			"Efficient Test Generation Algorithm for Path Delay Faults"
			 | 
| 12 | 
			"Efficient Algorithm and Architecture for Scan Conversion in HDTV"
			 | 
| 11 | 
			"Efficient Algorithm and Architecture for Post-processor in HDTV"
			 | 
| 10 | 
			"Simulatior Path Delay Faults on Mixed Level Circuits"
			 | 
| 9 | 
			"An Efficient Pipelined Parallel Architecture for Blocking Effect Removal in HDTV"
			 | 
| 8 | 
			"Knowledge Based Automatic Model Generation System"
			 | 
| 7 | 
			"High Performance Hardware Accelerator for Design Error Simulation"
			 | 
| 6 | 
			"Parallel BIST Architecture for CAMs"
			 | 
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