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166 |
"Advanced Low Pin Count Test Architecture for Efficient Multi-Site Testing"
|
|
165 |
"GPU-Based Redundancy Analysis Using Concurrent Evaluation"
|
|
164 |
"Efficient Systolic-Array Redundancy Architecture for Offline/Online Repair"
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163 |
"Dynamic Built-In Redundancy Analysis for Memory Repair"
|
|
162 |
"A Low-cost Concurrent TSV Test Architecture with Lossless Test Output Compression Scheme"
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|
161 |
"Test Friendly Data Selectable Self-Gating (DSSG)"
|
|
160 |
"Highly Reliable Redundant TSV Architecture for Clustered Faults"
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|
159 |
"An Efficient BIRA Utilizing Characteristics of Spare Pivot Faults"
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|
158 |
"TSV Repair Architecture for Clustered Faults"
|
|
157 |
"Test Resource Reused Debug Scheme to Reduce the Post-Silicon Debug Cost"
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