189 |
"Novel Error-Tolerant Voltage-Divider-Based Through-Silicon-Via Test Architecture"
|
188 |
"A Hybrid Test Scheme for Automotive IC in Multi-site Testing"
|
187 |
"Scan Cell Modification for Intra Cell-Aware Scan Chain Diagnosis"
|
186 |
"SPAR: A New Test Point Insertion Using Shared Points for Area Overhead Reduction"
|
185 |
"Multi-Bank Optimized Redundancy Analysis Using Efficient Fault Collection"
|
184 |
"ECMO: ECC Architecture Reusing Content Addressable Memories for Obtaining High Reliability in DRAM"
|
183 |
"Herringbone Based TSV Architecture for Clustered Fault Repair and Aging Recovery"
|
182 |
"Reduced-Pin-Count BOST for Test-Cost Reduction"
|
181 |
"ECC-Aware Fast and Reliable Pattern Matching Redundancy Analysis for Highly Reliable Memory"
|
180 |
"Low-Power Scan Correlation-Aware Scan Cluster Reordering for Wireless Sensor Networks"
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