194 |
"STRAIT: Self-Test and Self-Recovery for AI Accelerator"
|
193 |
"Scan Chain Architecture with Data Duplication for Multiple Scan Cell Fault Diagnosis"
|
192 |
"TRUST: Through-Silicon Via Repair Using Switch Matrix Topology"
|
191 |
"Shift Left Quality Management System (QMS) Using a 3D Matrix Scanning Method on System on a Chip"
|
190 |
"TSV Built-In Self-Repair Architecture for Improving the Yield and Reliability of HBM"
|
189 |
"Novel Error-Tolerant Voltage-Divider-Based Through-Silicon-Via Test Architecture"
|
188 |
"A Hybrid Test Scheme for Automotive IC in Multi-site Testing"
|
187 |
"Scan Cell Modification for Intra Cell-Aware Scan Chain Diagnosis"
|
186 |
"SPAR: A New Test Point Insertion Using Shared Points for Area Overhead Reduction"
|
185 |
"Multi-Bank Optimized Redundancy Analysis Using Efficient Fault Collection"
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