213 |
"A Robust Test Architecture for Low-Power AI Accelerators"
|
212 |
"SPOT: Fast and Optimal Built-In Redundancy Analysis using Smart Potential Case Collection"
|
211 |
"A Cost-Effective Per-Pin ALPG for High-Speed Memory Testing"
|
210 |
"An Efficient Low Power BIST for Automotive SoC with Periodic Pattern Type Selection"
|
209 |
"Low Cost TSV Repair Architecture Using Switch-Based Matrix for Highly Clustered Faults"
|
208 |
"A Novel Prediction-Based Two-Tiered ECC for Mitigating SWD Errors in HBM"
|
207 |
"Effective Parallel Redundancy Analysis Using GPU for Memory Repair"
|
206 |
"A New Pipelined Output Data Reducer of BOST for Improved Parallelism"
|
205 |
"RAPID Redundancy Analysis with Parallelized and Intelligent Distribution"
|
204 |
"PASS: Pattern-Sequence-Authentication-based Secure Scan against Reverse Engineering Attacks"
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