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136 |
"A New 3-D Fuse Architecture to Improve Yield of 3-D Memories"
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135 |
"Parallelized Network on Chip-reused Test Access Mechanism for Multiple Identical Cores"
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|
134 |
"Optimized Built-in Self Repair for Multiple Memories"
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133 |
"Tri-State Coding using Reconfiguration of Twisted Ring Counter for Test Data Compression"
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132 |
"Lifetime Reliability Enhancement of Microprocessors: Mitigating the Impact of Negative Bias Temperature Instability"
|
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131 |
"3D Stacked DRAM Refresh Management with Guaranteed Data Reliability"
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130 |
"Fully Programmable Memory BIST for Commodity DRAMs"
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129 |
"A New Accelerated Endurance Test for Terabit NAND Flash Memory using Interference Effect"
|
|
128 |
"Majority based Test Access Mechanism for Parallel Testing of Multiple Identical Cores"
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|
127 |
"Eco Assist Techniques through Real-time Monitoring of BEV Energy Usage Efficiency"
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