200 |
"GRAP: Efficient GPU-based Redundancy Analysis Using Parallel Evaluation for Cross Faults"
|
199 |
"A New ISA for High-Speed and Area-Efficient ALPG"
|
198 |
"A New Zero-Overhead Test Method for Low-Power AI Accelerators"
|
197 |
"RA-Aware Fail Data Collection Architecture for Cost Reduction"
|
196 |
"A New Fail Address Memory Architecture for Cost-Effective ATE"
|
195 |
"Reconfigurable Multi-bit Scan Flip-Flop for Cell-Aware Diagnosis"
|
194 |
"STRAIT: Self-Test and Self-Recovery for AI Accelerator"
|
193 |
"Scan Chain Architecture with Data Duplication for Multiple Scan Cell Fault Diagnosis"
|
192 |
"TRUST: Through-Silicon Via Repair Using Switch Matrix Topology"
|
191 |
"Shift Left Quality Management System (QMS) Using a 3D Matrix Scanning Method on System on a Chip"
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